发明名称 Mixed superscalar and VLIW instruction issuing and processing method and system
摘要 Techniques for processing transmissions in a communications (e.g., CDMA) system. A method and system for issuing and executing mixed architecture instructions in a multiple-issue digital signal processor receives in a mixed instruction listing a plurality of digital signal processor instructions. The plurality of digital signal processor instructions includes a plurality of parallel executable instructions (e.g., VLIW instructions or instruction packets) mixed among a plurality of series executable instructions (e.g., superscalar instructions). The series executable instructions are associated by various instruction dependencies. The method and system further identify in the mixed instruction listing the plurality of parallel executable instructions. Once identified, the parallel executable instructions are first executed in parallel irrespective of any such instruction's relative order in the mixed instruction listing. Then, the series executable instructions are executed serially according to said various instruction dependencies.
申请公布号 US7590824(B2) 申请公布日期 2009.09.15
申请号 US20050093375 申请日期 2005.03.29
申请人 QUALCOMM INCORPORATED 发明人 AHMED MUHAMMAD;PLONDKE ERICH;CODRESCU LUCIAN;ANDERSON WILLIAM C.
分类号 G06F9/30 主分类号 G06F9/30
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