| 发明名称 |
CIRCUIT CONFIGURATION AND MANUFACTURING PROCESSES FOR VERTICAL TRANSIENT VOLTAGE SUPPRESSOR (TVS) AND EMI FILTER |
| 摘要 |
<p>A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.</p> |
| 申请公布号 |
EP2087520(A2) |
申请公布日期 |
2009.08.12 |
| 申请号 |
EP20070867521 |
申请日期 |
2007.11.16 |
| 申请人 |
ALPHA & OMEGA SEMICONDUCTOR LIMITED |
发明人 |
MALLIKARARJUNASWAMI, SHEKAR;BOBDE, MADHUR |
| 分类号 |
H01L29/06 |
主分类号 |
H01L29/06 |
| 代理机构 |
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代理人 |
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