| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To parallelize circuits at a poststage of a CABAC decoding part without significantly increasing the capacity of a memory for temporary storage. <P>SOLUTION: An image decoding apparatus includes: an arithmetic decoding means for performing arithmetic decoding to a video stream; a storage means for storing binary data to which the arithmetic decoding is performed; an address calculation means for calculating address data for associating a position where the binary data is stored in the storage means with an image position after the binary data is decoded; a reading means for reading the binary data stored in the storage means; and N pieces of binary decoding means for performing binary decoding processing to the binary data read by the reading means. The binary decoding processing is performed while distributing the arithmetically decorded binary data into the N pieces of binary coding means by using a detected address. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
