发明名称 |
Semiconductor Memory Devices Including a Vertical Channel Transistor |
摘要 |
Semiconductor memory devices include a semiconductor substrate and a plurality of semiconductor material pillars in a spaced relationship on the semiconductor substrate. Respective surrounding gate electrodes surround ones of the pillars. A first source/drain region is in the semiconductor substrate between adjacent ones of the pillars and a second source/drain region is in an upper portion of at least one of the adjacent pillars. A buried bit line is in the first source/drain region and electrically coupled to the first source/drain region and a storage node electrode is on the upper portion of the at least one of the adjacent pillars and electrically contacting with the second source/drain region.
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申请公布号 |
US2009189217(A1) |
申请公布日期 |
2009.07.30 |
申请号 |
US20090418879 |
申请日期 |
2009.04.06 |
申请人 |
YOON JAE-MAN;PARK DONG-GUN;LEE CHOONG-HO;YI MOON-SUK;LEE CHUL |
发明人 |
YOON JAE-MAN;PARK DONG-GUN;LEE CHOONG-HO;YI MOON-SUK;LEE CHUL |
分类号 |
H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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