发明名称 |
Method of fabricating a dual-gate structure that prevents cut-through and lowered mobility |
摘要 |
A method of fabricating a dual-gate semiconductor device, including forming a first PMOS transistor on a semiconductor substrate, the first PMOS transistor having a first gate electrode and a first gate insulation layer; and forming a first NMOS transistor on the semiconductor substrate, the first NMOS transistor having a second gate electrode and a second gate insulation layer. The gate insulation layer of the first PMOS transistor is a silicon nitride oxide layer.
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申请公布号 |
US7566604(B2) |
申请公布日期 |
2009.07.28 |
申请号 |
US20070727290 |
申请日期 |
2007.03.26 |
申请人 |
OKI SEMICONDUCTOR CO., LTD. |
发明人 |
MOCHIZUKI MARIE |
分类号 |
H01L21/8234;H01L21/8238;H01L29/78 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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