发明名称 MULTI-LAYER PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF
摘要 A method for allowing an easier electric connection between layers of a multi-layer package structure using a metal pin fabricated based on semiconductor device processes is provided. A metal pin having a high aspect ratio is formed on a lower substrate, while a via hole is formed in an upper substrate. The metal pin is inserted into the via hole and adhered together to make an electric connection between the lower and upper substrates. The metal pin is obtained by patterning a thick photoresist material and plating a material thereon. The metal pin may have a core member obtained by performing a plating process on the surface of a patterned polymer based pin. Solder or gold is used for adhesion and electric connection between the signal line and the metal pin. The above electric connection method can be simpler and have improved structural stability compared with the typical connection method.
申请公布号 US2009175022(A1) 申请公布日期 2009.07.09
申请号 US20060281516 申请日期 2006.06.15
申请人 WAVENICS INC.;KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY 发明人 KWON YOUNG-SE;YOOK JON-MIN
分类号 H05K5/02;H01R12/00;H01R43/00 主分类号 H05K5/02
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