SEMICONDUCTOR DEVICE

摘要

Provided is a technology of further reducing an on-resistance (or on-voltage) of a vertical semiconductor device having a carrier blocking layer. A semiconductor substrate (20) of a semiconductor device (10) is provided with a channel region (10A) and a non-channel region (10B). In the channel region (10A), an emitter region (26) which is brought into contact with a side surface of a trench gate (30) and electrically connected to an emitter electrode (28) is arranged. In a body region (25) of the non-channel region (10B), the emitter region (26) is not arranged. In the plan view, the ratio of an area occupied by the carrier blocking layer (52) arranged in the non-channel region (10B) to the non-channel region (10B) is higher than the ratio of an area occupied by the carrier blocking layer (52) arranged in the channel region (10A) to the channel region (10A).