发明名称 Methods of forming gatelines and transistor devices
摘要 The invention includes semiconductor constructions, methods of forming gatelines, and methods of forming transistor structures. The invention can include, for example, a damascene method of forming a gateline. A thin segment of dielectric material is formed between two thicker segments of dielectric material, with the thin and thicker segments of dielectric material being within an opening. A gateline material is formed within the opening and over the thin and thicker segments of dielectric material. The construction comprising the gateline material over the thin and thicker segments of dielectric material can be supported by a semiconductor substrate having a primary surface which defines a horizontal direction. The thin and thicker segments of dielectric material can comprise upper surfaces substantially parallel to the primary surface of the substrate, and can join to one another at steps having primary surfaces substantially orthogonal to the primary surface of the substrate.
申请公布号 US7544554(B2) 申请公布日期 2009.06.09
申请号 US20060418556 申请日期 2006.05.05
申请人 MICRON TECHNOLOGY, INC. 发明人 PAREKH KUNAL R.;MANNING H. MONTGOMERY
分类号 H01L21/336 主分类号 H01L21/336
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