发明名称 METHOD AND ARRANGEMENT FOR ENHANCING PROCESS VARIABILITY AND LIFETIME RELIABILITY THROUGH 3D INTEGRATION
摘要 A method of enhancing semiconductor chip process variability and lifetime reliability through a three-dimensional (3D) integration applied to electronic packaging. Also provided is an arrangement for implementing the inventive method.
申请公布号 US2009144669(A1) 申请公布日期 2009.06.04
申请号 US20070947207 申请日期 2007.11.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BOSE PRADIP;KURSUN EREN;RIVERS JUDE A.;ZYUBAN VICTOR
分类号 B25B11/00 主分类号 B25B11/00
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