发明名称 Processor integrated circuit comprising a plurality of processors having local memories and means for synchronising DMA accesses to these memories
摘要 A processor integrated circuit according to the present invention comprises low-speed and high-speed computing units (110,120) as two or more kinds of computing units, a program memory (131) as a first storage unit in which programs for operation the computing units are stored, a data memory (second storage unit) (132) as a memory area to be used for computation by the computing units, and selectors (141,142) as first and second connection switching units for connecting a computing unit that performs computation to the first and second storage units, wherein the program memory (131) and the data memory (132) are connected to the low-speed computing unit (110) or the high-speed computing unit (120). The processor integrated circuit comprises two DMA controllers for communication with devices outside of the processor integrated circuit.
申请公布号 EP2065808(A1) 申请公布日期 2009.06.03
申请号 EP20090155014 申请日期 2004.08.06
申请人 PANASONIC CORPORATION 发明人 HIRANO, TAKEHISA;NAKAI, KATSUHIRO;TEZUKA, TOMOAKI;MUKAI, KOUJI
分类号 G06F15/78;G06F9/06;G06F9/30;G06F9/38;G06F12/00;G06F13/16;G06F13/28;G06F15/17;G06F17/50 主分类号 G06F15/78
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