| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To suppress, when a power source pad is arranged at one end of a memory cell array and sense amplifiers are arranged at the one end and the other end of the memory cell array, voltage drop of a power source caused at the sense amplifier of the other end and increase in chip area caused by the increase of wiring width of power source wiring from a power source pad to the sense amplifier of the other end. <P>SOLUTION: The power source pad 20 and a sense amplifier 12A are arranged at one end of a memory cell array 11. A first bit line is arranged correspondingly to the sense amplifier 12A, and the first bit line is sensed by the sense amplifier 12A. A sense amplifier 12B is arranged at the other end of the memory cell array 11. A second bit line is arranged adjacently to the first bit line correspondingly to the sense amplifier 12B, and the second bit line is sensed by the sense amplifier 12B. A connecting circuit 21 connects the first bit line and the second bit line to the sense amplifier 12A during pre-charge operation for pre-charging the first bit line and the second bit line. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
