CIRCUIT WITH A PLURALITY OF PROCESSORS CONNECTED TO A PLURALITY OF MEMORY CIRCUITS VIA A NETWORK

摘要

A plurality of computer programs is executed concurrently with a plurality of processors (10) that are coupled to a plurality of shared memory circuits (14) via a communication network (12). A data object is stored distributed over the plurality of shared memory circuits (14), in respective memory portions of the shared memory circuits (14). Access to a data object by different ones of the processors (10) during a program execution period is made mutually exclusive by executing acquire and release instructions of a semaphore flag for the data object. Write operation records for the write instructions are buffered in buffers (34) in the processors. Messages are transmitted via a communication network (12), comprising the write operation records from the buffers, to those of the shared memory circuits (14) where the parts are stored that are addressed by the write operations. Processing of the messages is signaled by the shared memory circuits (14) back to the processors (10). Each processor (10) verifies prior to clearing the semaphore flag in response to the release instruction that signals have been received that all previous messages to all shared memories that store data from the data object have been processed.