发明名称 |
SEMICONDUCTOR DEVICE |
摘要 |
<p>There is provided a semiconductor device formed of a highly integrated high-speed CMOS inverter coupling circuit using SGTs provided on at least two stages. A semiconductor device according to the present invention is formed of a CMOS inverter coupling circuit in which n (n is two or above) CMOS inverters are coupled with each other, each of the n inverters has: a pMOS SGT; an nMOS SGT, an input terminal arranged so as to connect a gate of the pMOS SGT with a gate of the nMOS SGT; an output terminal arranged to connect a drain diffusion layer of the pMOS SGT with a drain diffusion layer of the nMOS SGT in an island-shaped semiconductor lower layer; a pMOS SGT power supply wiring line arranged on a source diffusion layer of the pMOS SGT; and an nMOS SGT power supply wiring line arranged on a source diffusion layer of the nMOS SGT, and an n-1th output terminal is connected with an nth input terminal.</p> |
申请公布号 |
EP2061075(A1) |
申请公布日期 |
2009.05.20 |
申请号 |
EP20080711292 |
申请日期 |
2008.02.14 |
申请人 |
UNISANTIS ELECTRONICS (JAPAN) LTD.;TOHOKU UNIVERSITY |
发明人 |
MASUOKA, FUJIO;NAKAMURA, HIROKI |
分类号 |
H01L21/8238;H01L21/768;H01L21/82;H01L21/822;H01L23/522;H01L27/04;H01L27/08;H01L27/092;H01L29/41;H01L29/417;H01L29/423;H01L29/49;H01L29/78;H01L29/786 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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