发明名称 MULTIPLY APPARATUS FOR SEMICONDUCTOR TEST PARTERN SIGNAL
摘要 <p>An apparatus for multiplying a semiconductor test pattern signal is disclosed. The multiplying apparatus firstly encodes a plurality of pattern signals to have different pattern types, and multiplies the encoded pattern signals according to an exclusive-OR (XOR) scheme in order to generate a single pattern signal, thereby recognizing a relationship between a pattern signal before the multiplication and the other pattern signal after the multiplication. A pattern-signal segment ing/ out put ting unit segments a semiconductor test pattern signal into a plurality of pattern signals, and simultaneously outputs the segmented pattern signals. A pattern-signal restoring/multiplying unit restores the segmented pattern signals received from the pattern-signal segment ing/ out put ting unit to the semiconductor test pattern signal, outputs the restored result to a driver which records a test pattern in an objective semiconductor to be tested, and multiplies the signal output ted to the driver by a predetermined frequency band rather than a frequency band of the segmented signals.</p>
申请公布号 WO2009054651(A1) 申请公布日期 2009.04.30
申请号 WO2008KR06156 申请日期 2008.10.17
申请人 INTERNATIONAL TRADING & TECHNOLOGY CO., LTD.;CHANG, KYUNG-HUN;OH, SE-KYUNG 发明人 CHANG, KYUNG-HUN;OH, SE-KYUNG
分类号 G11C29/00 主分类号 G11C29/00
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