发明名称 MICROCOMPUTER
摘要 <P>PROBLEM TO BE SOLVED: To monitor whether or not a specific instruction fetched by a central processing unit and an interrupting processing program or an initialization program has been normally executed by the central processing unit. <P>SOLUTION: An instruction fetched and decoded by a central processing unit (10) is decoded by the outside of the central processing unit, and the number of clock cycles of a clock signal required for the execution of the decoded specific instruction is judged. When the execution of the specific instruction ends, the operation of the central processing unit is stopped when the number of clock cycles required for the execution of the instruction is different from the judged number of clock cycles. Also, when the value of a program counter which is being executed by the interrupting processing program is deviated from the address area of the corresponding interrupting processing program, the operation of the central processing unit (21) is stopped. Also, after reset release, when the value of the program counter is deviated from the address region of the initialization program during the initialization of the specific circuit module, the operation of the central processing unit (30) is stopped. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009070114(A) 申请公布日期 2009.04.02
申请号 JP20070237476 申请日期 2007.09.13
申请人 RENESAS TECHNOLOGY CORP 发明人 AMANUMA YOSHIYUKI;AKITA KENJI;TOYOSHIMA MAKOTO
分类号 G06F21/06;G06F11/30;G06F11/34;G06F12/14;G06F21/24;G06K19/073 主分类号 G06F21/06
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