MOS TRANSISTOR AND CMOS TRANSISTOR HAVING STRAINED CHANNEL EPI LAYER AND METHODS OF FABRICATING THE TRANSISTORS

摘要

A MOS transistor and CMOS transistor having a strained channel epi layer and methods of fabricating the transistors are provided to reduce the process cost for growing the epi layer by selectively forming the channel epi layer inside the channel trench. An N active region and a P active region are limited on an NMOS region and a PMOS region by forming the device isolation structure on a substrate(100). A pad oxide film(121) and a hard mask film(123) are formed in the substrate. N channel trench is created in the N active region by selectively etching the N active region. Transformed N channel epi layer(131) is formed within the N channel trench. The P channel trench is created in the P active region by selectively etching the P active region. A transformed P-channel epi layer(141) is formed in the P channel trench. An N gate electrode and a P gate electrode are formed by etching back the gate conductive film.