| 发明名称 |
Semiconductor device and method for manufacturing the same |
| 摘要 |
<p>Gate length is 110 nm ± 15 nm or shorter (130 nm or shorter in a design rule) or an aspect ratio of an area between adjacent gate electrode structures thereof (ratio of the height of the gate electrode structure to the distance between the gate electrode structures) is 6 or higher. A PSG (HDP-PSG: Phospho Silicate Glass) film containing a conductive impurity is formed as an interlayer insulating film for burying the gate electrode structures at film-formation temperature of 650°C or lower by a high-density plasma CVD (HDP-CVD) method.
</p> |
| 申请公布号 |
EP1351287(A3) |
申请公布日期 |
2009.03.11 |
| 申请号 |
EP20020025620 |
申请日期 |
2002.11.19 |
| 申请人 |
FUJITSU MICROELECTRONICS LIMITED |
发明人 |
OHASHI, HIDEAKI |
| 分类号 |
H01L21/283;H01L21/768;H01L21/31;H01L21/316;H01L21/60;H01L21/8234;H01L21/8238;H01L21/8242;H01L23/485;H01L23/532;H01L27/092;H01L27/10;H01L27/108;H01L29/78 |
主分类号 |
H01L21/283 |
| 代理机构 |
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