| 摘要 |
A ball grid array device with an insulating substrate (110) having metal traces (106, for example copper, about 18 mum thick) with sidewalls (108) at right angles to the trace top. The traces are grouped in a first (120) and a second set (121). The first set traces have the top surface covered by a thin noble metal (for example a nickel layer (130) about 0.1 mum thick and an outermost gold layer (131) about 0.5 mum thick), while the sidewalls are un-covered by the noble metal. About 1.5 mum are thus gained for the trace spacing; oxidation of the trace sidewalls is enabled. The second set traces have the top surface un-covered by the noble metal; the traces are covered by an insulating soldermask. A semiconductor chip (101) with terminals (102) is attached to the substrate with the terminals connected to the noble metal of the first set traces, either by bonding wires (for example gold) or by metal studs (for example gold). The assembled chip and the first set traces are encapsulated in a polymerized compound (160), which adheres to the oxidized trace sidewalls and locks into the trace undercuts at the substrate interface.
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