| 摘要 |
PROBLEM TO BE SOLVED: To provide an operation timing verification device capable of performing a clock skew calculation in consideration of a clock delay time inside a macro. SOLUTION: A delay time calculation means 21 inputs a circuit net list 11, and outputs wiring delay information and the delay information of a macro and a cell as an SDF 14 by using a cell library 12 and a macro-delay library 13. In the operation timing verification of a signal path whose start point block is a macro, and whose end point block is a cell, a delay analyzing means 22 defines a time calculated by adding the clock delay time inside the macro described in a macro-clock correction delay library to a wiring delay time from a source clock to the clock terminal of the macro as the clock delay time of the macro, and defines the wiring delay time from the source clock to the clock terminal of the cell as the clock delay time of the cell, and calculates a difference between the time as a clock skew. COPYRIGHT: (C)2009,JPO&INPIT
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