| 摘要 |
<p>The present disclosure relates to a circuit and method for reducing intermodulation distortion in a non-linear device having a differential output stage. A calibration circuit is provided for adding a calibration offset voltage to at least one of one output branch of the differential output stage and a bulk terminal of a transistor of one output branch of the differential output stage to obtain a desired output offset at the differential output stage. Thereby, a certain degree of asymmetry is introduced so that both output branches of the differential output stage are matched or optimized to improve the IIP2 factor and reduce intermodulation distortions.</p> |
