发明名称 |
LAYOUT STRUCTURE OF ACTIVE RESISTOR |
摘要 |
A layout structure of an active resistor is provided to minimize a substrate noise and a coupling noise by forming N-type pocket well in a P-type substrate. At least two P-well regions are formed in a P-type substrate(200). The P-well regions are separated from each other by N-type pocket wells. At least two N-type active regions(110,120) are formed on the P-well regions and the N-type active regions are connected to each other by branch(130).
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申请公布号 |
KR20090016061(A) |
申请公布日期 |
2009.02.13 |
申请号 |
KR20070080423 |
申请日期 |
2007.08.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JUNG, SANG HOON;YI, CHUL WOO |
分类号 |
H01C10/16 |
主分类号 |
H01C10/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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