发明名称 VARISTOR
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a varistor capable of reducing capacitance, while maintaining proper voltage nonlinear characteristics. <P>SOLUTION: A lamination chip varistor comprises a voltage nonlinear resistance layer, and internal electrodes, arranged so as to sandwich the voltage nonlinear resistance layer. A voltage nonlinear resistance ceramic composition for forming the voltage nonlinear resistance layer contains a mixed phase which mixes a first phase P1, mainly containing zinc oxide and a second phase P2 containing an oxide of Ca and Si. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009026954(A) 申请公布日期 2009.02.05
申请号 JP20070188496 申请日期 2007.07.19
申请人 TDK CORP 发明人 MATSUOKA MASARU
分类号 H01C7/10 主分类号 H01C7/10
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