发明名称 MEMORY INTERFACE CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a memory interface circuit which does not need special calibration and receives correct data by removing glitch caused in a data strobe signal. <P>SOLUTION: The memory interface comprises input receivers (buffers) 102 for receiving the data strobe signals DQS, a mask control signal generating circuit 107 for generating a mask control signal REN, a delay circuit 104 for delaying the inputted DQS to output a delayed signal DQSD, an I/O replica circuit 103 for delaying the REN by a delay amount corresponding to the input/output delay characteristic of input/output buffers, a delay circuit 105 for delaying RENFB by the replica circuit following to the delay of the DQS to output a delay-controlled signal REND, and a mask circuit 106 for generating the data strobe signal by using the REND as a reference timing to generate a mask signal and masking the delayed signal DQSD corresponding to the mask signal for a preset time to remove the glitch. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009009621(A) 申请公布日期 2009.01.15
申请号 JP20070167375 申请日期 2007.06.26
申请人 SONY CORP 发明人 SHIMOMURA YUKIO
分类号 G11C11/4076;G11C11/407 主分类号 G11C11/4076
代理机构 代理人
主权项
地址