发明名称 Optimized circuits for three dimensional packaging and methods of manufacture therefore
摘要 An embodiment of the present invention provides an apparatus, comprising an integrated circuit, wherein a first portion of the integrated circuit is placed on a top tier substrate and a second portion of the integrated circuit is placed on a bottom tier substrate stacked adjacent the top tier substrate and wherein the first portion and the second portion of the integrated circuit are interconnected; and printed spiral arms stacked vertically on both the top and bottom surface of the top tier substrate thereby creating high Q inductors.
申请公布号 US7471146(B2) 申请公布日期 2008.12.30
申请号 US20060353930 申请日期 2006.02.14
申请人 PARATEK MICROWAVE, INC. 发明人 MACROPOULOS WILLIAM;MENDOLIA GREG;OAKES JAMES G.;KHAYO IZZ
分类号 H03G3/00;H03G3/20 主分类号 H03G3/00
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