发明名称
摘要 A memory cell array of a NAND flash memory device includes memory cells connected to bit lines and word lines. A page buffer unit includes cell program test circuits configured to program data into a selected memory cell or read data from the memory cell. An IO controller includes a program confirm decision circuit for outputting a cell program confirmation signal when a cell is programmed. A voltage providing unit changes a step of a program voltage according to the cell program confirmation signal and provides the program voltage.
申请公布号 KR100875006(B1) 申请公布日期 2008.12.19
申请号 KR20070027217 申请日期 2007.03.20
申请人 发明人
分类号 G11C16/12;G11C16/02;G11C16/06 主分类号 G11C16/12
代理机构 代理人
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