发明名称 INFORMATION PROCESSING EQUIPMENT
摘要 <p>PURPOSE:To execute a processing at a high speed, and to simplify a circuit design and wiring, by decoding an instruction to be executed, and selecting a necessary machine cycle in order, in an information processing equipment having a machine cycle generating circuit. CONSTITUTION:A generation request signal of a machine cycle required for executing each instruction is inputted to a timing controlling circuit 6, a data processing function which is controlled by a machine cycle signal is set in advance, and when executing the instruction, an instruction code which has been read out from a read- only memory 1 is decoded, each machine cycle signal and a control signal are outputted, and a necessary machine cycle is selected so that it is generated in order. According to this constitution, an unnecessary machine cycle is skipped and only a machine cycle signal required for processing is outputted. Accordingly, the processing is executed at a high speed and also to each machine cycle is assigned in advance a processing circuit by which the processing is executed in its period, therefore, a circuit design and wiring become very simple.</p>
申请公布号 JPS5719844(A) 申请公布日期 1982.02.02
申请号 JP19800092542 申请日期 1980.07.07
申请人 NIPPON ELECTRIC CO 发明人 NISHIGUCHI YUKIHIRO
分类号 G06F9/30;G06F1/04;G06F1/06;G06F9/22;G06F9/38 主分类号 G06F9/30
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