| 摘要 |
PURPOSE:To prevent damaged function of a data processor or the like by allowing the indication of the state in a logical circuit having a sequence circuit chain to a scan control section while a means of checking an erratic pit shaft action to halt the normal operation of the logic circuit. CONSTITUTION:Logic circuits 1a and 1b-1n constitute a group of logic circuits made up of the number (n) of logic circuits. A system clock supply circuit 1a' is contained in the logic circuit 1a supplies to each of the logic circuits 1a-1n through a system clock line 3 while a signal for controlling the supply thereof thereto through a clock control line 4. A scan control section 2 selects any of the logic circuits 1a-1n arbitrarily with a state indication specifying line 6 and causes it to be indicated with a state indication line 5. When state information indicates that a bit shifting action is possible in the logic circuit involved, for example, when the logic circuit involved is 1b, the scan control section 2 causes the system clock checked to the logic circuit 1b selected with a scan specifying line 7 and instead, data is inputted through a data input line 8 to set the state of a sequence circuit chain thereof 1b. |
