Processor system using on-chip refresh address generator for dynamic memory

摘要

A processor system employs a self-refresh memory device which comprises an array of rows and columns of dynamic-type memory cells with on-chip refresh address generator circuitry including an address counter or commutator and a multiplexer to insert the refresh address when a command is received or internally generated indicating a refresh cycle. If a refresh command is not being executed, the device is accessed by the processor in the usual manner if a memory address is received.