发明名称 CLOCK SUPPLY DEVICE
摘要 PURPOSE:To secure the reliability and improve the maintain-ability to supply a stable clock to a system by making not only oscillating circuits but also selector circuits and VCO circuits dual in a clock supply device consisting of systems 0 and 1 and adjusting phases of dual clocks periodically. CONSTITUTION:Respective systems of the clock supply device are provided with oscillating circuits 15 and 16, and frequencies of oscillating circuits are multiplied by 1/N by N-notation counters 13 and 14. Clocks of 1/N-fold frequencies of both systems are led into selector circuits 9 and 10, and one of them is selected in accordance with conditions of trouble detecting circuits 7 and 8. When the clock of the system '0' is selected in the system '0', the clock of the system '0' is selected also in the system '1'. Selected clocks are pass phase lock loops PLL consisting of phase comparators 5 and 6, low pass filters 3 and 4, and VCO circuits 1 and 2 and are outputted to the operation system through lines A and B. Phase detection start circuits 11 and 12 compensate clock phases of both of the system '0' and the system '1'.
申请公布号 JPS61267493(A) 申请公布日期 1986.11.27
申请号 JP19850108148 申请日期 1985.05.22
申请人 HITACHI LTD 发明人 IINO YUKIO
分类号 H04Q11/04;G06F1/04;H04Q3/545 主分类号 H04Q11/04
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