| 摘要 |
PURPOSE:To specify an optional FF circuit and to trace its output signal continuously by latching the value of an FF circuit by a latch circuit and outputting the value of the FF circuit. CONSTITUTION:The FF circuit whose value is to be read is specified firstly. Then, a control signal 9 is set to '1' and the value of each FF circuit is inputted to a latch circuit 8. Then a test is taken. Namely, a mode control signal 4 is set to '1', a control signal 9 is set to 'phi', and an optional value is set in each FF circuit in synchronism with a clock signal 6 from a scan input terminal 5. When the signal 4 is set to 'phi', a signal outputted from a combinational logic circuit 2 is inputted to a next-stage FF circuit in synchronism with the signal 6. At this time, only the circuit 8 which latches '1' turns on a transmission gate 11, so the value of the specified FF circuit is read out from an output terminal 12. Then, the state of variation in the value of the specified circuit is read out from the terminal 12 in synchronism with the signal 6.
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