发明名称 SEQUENCE CONTROLLER
摘要 The controller comprises a memory circuit for storing commands and program steps, an arithmatic control circuit for processing program steps, and an output circuit for providing output signal. The arithmatic control circuit includes a buffer memory for storing a result of each program step temporarily so that the insertion or deletion of the program at an arbitary step can be done without changing the step address. The result information stored in the buffer memory is changed with new information in case of changing the program and provided to the output circuit in short period rather than a response time of the switching means connected to the output circuit so that the intervening noise to the output circuit can be removed.
申请公布号 KR880001214(B1) 申请公布日期 1988.07.11
申请号 KR19820000056 申请日期 1982.01.08
申请人 HITACHI, LTD. 发明人 KUROKAYA, NAOHIRO;ABE, RYO-CHI
分类号 G05B19/02;G05B19/05;(IPC1-7):G05B19/02 主分类号 G05B19/02
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