| 摘要 |
PURPOSE:To avoid the variation of a transistor characteristics even if a discrepancy occurs in mask alignment by a method wherein an even number of, or an odd number, not less than 5, of gate electrodes are provided and source and drain regions and the respective gate electrodes are arranged on a straight line along the direction of the source and drain. CONSTITUTION:Two gate electrodes 1, n<->type regions 2 and n<+>type regions 3 are provided to constitute a transistor. In order to obtain a high breakdown strength, the gate electrodes 1 are kept apart from a field edge. Further, as the transistor is in an offset state under these conditions, the n<->type regions 2 are provided under the gate electrodes 1 around the n<+>type regions 3. Even if contact holes 4 is shifted to any direction relative to the gate electrodes, the summations of the diffusion resistances of the respective sources and drains can be equal or within a negligible error because the increased values and decreased values of the diffusion resistances on both the sides of the respective gate electrodes 1 cancel each other. Therefore, the variation of the transistor characteristics can be avoided. |
