| 摘要 |
PURPOSE:To obtain data free from jitter by performing data transmission from a first device alternately during a data transmission period and a data in pause period, and synchronizing the system clock of the first device with a reference clock during the data quiescent period. CONSTITUTION:The data transmission from the first device 100A to a second device 100B is performed by every one frame except during the data in pause period. During the data in pause period, the frequency divided clock 37a of the reference clock 101 is sent from the second device to the first device. The first device phase-locks its system clock 102 with the received frequency divided clock by a PLL circuit. Then, in the next data transmission period, the time constant of the PLL circuit is made large, and the phase of the system clock 102 established during the preceding data in pause period is made into a held state. Since the second device receives the transmitted data by latching it by the reference clock, it can evade the influence of the jitter to be caused during optical transmission. |
