发明名称 METHOD FOR FABRICATING ISOLATION LAYER OF THE SEMICONDUCTOR DEVICE
摘要 <p>A method for forming an isolation layer of a semiconductor device is provided to improve a black-down voltage characteristic and a leakage current characteristic of a PN junction between active regions. A pad nitride layer(33) is formed on a semiconductor substrate(31). A part of the pad nitride layer is removed. A TEOS oxide layer(34) is formed on the pad nitride layer. An isolation region and a field region are defined and the TEOS oxide layer and the pad nitride layer of the isolation region are selectively removed to expose the semiconductor substrate of the isolation region. A trench(36) is formed by etching the exposed semiconductor substrate. An HDP(High Density Plasma) oxide layer(38) is deposited on an entire surface of the semiconductor substrate, in order to fill up the trench. An isolation layer is formed within the trench by removing the HDP oxide layer and the TEOS oxide layer.</p>
申请公布号 KR100864935(B1) 申请公布日期 2008.10.23
申请号 KR20070086534 申请日期 2007.08.28
申请人 DONGBU HITEK CO., LTD. 发明人 HONG, JI HO
分类号 H01L21/76 主分类号 H01L21/76
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