| 摘要 |
<p>A method for forming a metal interconnection of a semiconductor device is provided to perform an interconnection process for connecting a cell region and a peripheral circuit region by using a hard mask pattern having a pitch not greater than the resolution of exposure equipment. A metal interconnection layer(101) and a hard mask layer(102) are sequentially stacked on an interconnection region that connects a cell line and a peripheral circuit region. A first sub pattern is formed on the hard mask layer. Spacers are formed on the sidewall and the upper surface of the first sub pattern. A second sub pattern is formed in a space between the spacers. The spacer is removed. The hard mask layer is etched by an etch process using the first and second sub patterns to form a hard mask pattern. The metal interconnection layer is etched by an etch process using the hard mask pattern to form an interconnection line that connects a metal interconnection of the cell line with a pad in the peripheral circuit region. The thickness of the spacer can be adjusted to control an interval between the first sub pattern and the second sub pattern.</p> |
