发明名称 |
Adaptive hysteresis receiver for a high speed digital signal |
摘要 |
An adaptive hysteresis receiver processes a high speed digital signal. A differential receiver circuit compares the high speed digital signal to a reference voltage to generate an output signal. A register circuit latches the output signal, according to a clock signal, to produce a control signal. A reference voltage generator generates the reference voltage, from a plurality of voltages defining a deep hysteresis level and a shallow hysteresis level, in response to the output signal and the control signal.
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申请公布号 |
US7433426(B2) |
申请公布日期 |
2008.10.07 |
申请号 |
US20040831095 |
申请日期 |
2004.04.23 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
ZHU ZHUBIAO;KOCH, II KENNETH;JOHNSON DAVID J. C. |
分类号 |
H03K9/00;H03K5/08;H03K5/1252;H04L25/06;H04L25/08;H04L27/00 |
主分类号 |
H03K9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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