| 摘要 |
PROBLEM TO BE SOLVED: To surely detect an error in the case of Read Modify Write. SOLUTION: Each time cache data are read, an LSI330 being a DMA chip operates the BCC check of cache data by a BCC check block 339, and a CM read block 338 turns on the "BBC check bit" and "BCC error bit" of "data transfer end notification" in response to whether or not check has been finished and the check result. Furthermore, an FCC check block 340 operates the FCC check of the cache data, and turns on the "FCC check bit" and "FCC error bit" of "data transfer end notification" in response to the whether or not check has been finished and the check result. Then, the CM read block 338 transmits "data transfer end notification" through a descriptor block 336 to a CPU 43 in ending data transfer. COPYRIGHT: (C)2008,JPO&INPIT
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