| 摘要 |
PROBLEM TO BE SOLVED: To provide a detection rate calculation method of a test pattern for calculating the degree of detection by the test pattern of a short-circuit failure generated between adjacent wires in a semiconductor integrated circuit, and also to provide a computer program and a detection rate calculation device of the test pattern, which execute the method and show the detection rate to a designer. SOLUTION: A layout generation program 12 generates layout data 25 from circuit data 21, and creates information of adjacent wires from the layout data 25 as adjacent wire information 24, and outputs the result. A transistor level simulation program 11 performs simulation by using the test pattern 22, and generates the electric potential of each wire in the circuit as electric potential information 23, and outputs it. A failure detection rate calculation program 13 checks whether the electric potential difference between adjacent wires is greater than a prescribed electric potential difference, from the adjacent wire information 24 and the electric potential information 23, and calculates the detection rate of the short-circuit failure, based on the result. COPYRIGHT: (C)2007,JPO&INPIT
|
