发明名称 Buffer management in vector graphics hardware
摘要 A graphics processor or a graphics block for use in a processor includes a type buffer used for determining if a currently processed pixel requires further processing. Each pixel has a number of sub-pixels and each sub-pixel line includes at least one counter that is stored in an edge buffer. A limited edge buffer that can store edge buffer values in a limited range can be employed. Each buffer can include information regarding the whole screen or a portion of thereof. The edge buffer also can be an external or internal buffer, and when implemented internally, the graphics processor or graphics block need not employ a bi-directional bus.
申请公布号 US2007109309(A1) 申请公布日期 2007.05.17
申请号 US20050272867 申请日期 2005.11.15
申请人 BITBOYS OY 发明人 TUOMI MIKA
分类号 G06F12/10 主分类号 G06F12/10
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