METHOD FOR ESTIMATING TEST YIELD TO SEMICONDUCTOR PRODUCT AND PROGRAM FOR EXECUTING METHOD (ESTIMATION OF TEST YIELD TO SEMICONDUCTOR PRODUCT PREPARED FROM LIBRARY)

摘要

PROBLEM TO BE SOLVED: To provide a method for estimating a test yield to a semiconductor before a design layout.

SOLUTION: The method is achieved by applying a critical area analysis to individual library elements used to form a specified product and estimating an affection on the test yield by a combination of these library elements. For example, the method takes into account an affection on a test yield of sensitivity to short-circuiting between the library elements and an affection on a test yield of sensitivity to wiring fault. The method can further trade off an increase in die size to the usage of the library elements having a high test yield. Accordingly, selections of the library elements can be changed so as to allow the test yield to be optimized. The method further repeats verifications at major design check points to again verify the acceptability of an initial test yield estimated value at a time when a product is estimated to a client.

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