发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a PLL circuit which is equipped with a frequency coase adjusting circuit and improves stability and shortens lock time. <P>SOLUTION: The PLL circuit is equipped with the frequency coarse adjusting circuit which roughly adjusts the oscillation frequency of a voltage-controlled oscillator. The frequency coarse adjusting circuit includes a comparator which compares a control voltage outputted from a charge pump with a reference voltage and outputs an up signal or down signal as a comparison result and a counter which counts up or down according to the up signal or down signal outputted from the comparator and outputs a count value for roughly adjusting the oscillation frequency of the voltage-controlled oscillator. Then a wired connection is made between the up signal outputted from the comparator and a down signal outputted from a phase comparator and a wired connection is made between the down signal outputted from the comparator and an up signal outputted from the phase comparator. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006121365(A) 申请公布日期 2006.05.11
申请号 JP20040306365 申请日期 2004.10.21
申请人 KAWASAKI MICROELECTRONICS KK 发明人 TAKEUCHI HIROSHI
分类号 H03L7/10;H03L7/107 主分类号 H03L7/10
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