发明名称 MONITOR OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the number of critical wires in an operation, and to monitor an internal signal on a real time basis. SOLUTION: Bus signals S1-S3 are divided into two groups according to the signal flowing direction and the circuit magnitude of modules A, B and C for outputting the bus signals. Monitor selecting circuits 1a and 1b corresponding to the groups output one signal in the bus signals, or output a low level. Logic circuits 2a and 2b receive the output signal of the monitor selecting circuits, and output the output signal of any one monitor selecting circuit. The monitor selecting circuits have signal selection registers 12a and 12b common to all monitor selecting circuits for holding values for determining the bus signal to be output, and signal selecting circuits 11a and 11b for outputting the bus signals in the group based on the values of the signal selection registers. Each monitor selecting circuit is arranged near the module to which the bus signal belongs, and each logic circuit is arranged near an external output terminal for the monitor. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006113016(A) 申请公布日期 2006.04.27
申请号 JP20040302973 申请日期 2004.10.18
申请人 NEC ENGINEERING LTD 发明人 KOIZUMI SHINJI
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
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