发明名称 |
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SYNCHRONOUS/ ASYNCHRONOUS OPERATION AND DATA INPUT/ OUTPUT METHOD THEREOF |
摘要 |
A semiconductor memory device capable of synchronous/asynchronous operation and a data input/output method of the semiconductor memory device are provided to maintain data coherency during a mode change. According to a semiconductor memory device operating in a first mode and a second mode, a memory cell array(12) has memory cells arranged in matrix of rows and columns. A peripheral circuit writes data in a cell of the memory cell array, and reads written data. A bypass control unit(30) enables rate write operation and bypass operation of the peripheral circuit when the semiconductor memory device operates in the first mode, and disables the rate write operation and the bypass operation of the peripheral circuit when the semiconductor memory device operates in the second mode.
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申请公布号 |
KR20080065061(A) |
申请公布日期 |
2008.07.11 |
申请号 |
KR20070001970 |
申请日期 |
2007.01.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, YOUNG SEUNG;PARK, CHUL SUNG |
分类号 |
G11C7/10 |
主分类号 |
G11C7/10 |
代理机构 |
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地址 |
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