发明名称 INTEGRATED CIRCUIT DESIGN DEVICE, INTEGRATED CIRCUIT DESIGN METHOD AND INTEGRATED CIRCUIT DESIGN PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a new integrated circuit design technology allowing efficient execution of wiring design of a shield-equipped clock wiring line. SOLUTION: This integrated circuit design device has: a storage means storing a list of an identifier of the usable shield-equipped clock wiring, and information about a division rule for describing a division form of the shield-equipped clock wiring indicated by the identifier; a means inputting a wiring layer of the shield-equipped clock wiring performed with a wiring request, the identifier of the shield-equipped clock wiring, and a start point and an end point of the shield-equipped clock wiring; a means specifying the division rule of the shield-equipped clock wiring indicated by the input identifier by referring to the storage means; and a means deciding whether the shield-equipped clock wiring of a division result wherein the division is performed based on the specified division rule is spatially permitted or not in terms of space to decide whether the shield-equipped clock wiring performed with the wiring request is permitted or not. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008186230(A) 申请公布日期 2008.08.14
申请号 JP20070018948 申请日期 2007.01.30
申请人 FUJITSU LTD 发明人 ITO NORIYUKI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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