| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a power voltage generating circuit for further reducing a chip area. <P>SOLUTION: The circuit is provided with a boosting part 20 generating and outputting boosted voltage by charge pumping of a capacity element, a power source voltage drop part 10 lowering the voltage of an external power source within a range of breakdown voltage of the capacity element when voltage of the external power source exceeds breakdown voltage of the capacity element, and a switch element SW1 switching whether the external power source is given directly to a power source of the boosting part 20 or is given through the power source voltage drop part 10. The boosting part 20 is constituted of a multi-stage boosting circuit, wherein gate oxide films of the capacity element constituted of MOS transistors included in each of multi-stage boosting circuit are the same, and thinner than a gate oxide film of the MOS transistor included in a circuit using an output of the boosting part 20 as a power source. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
