| 摘要 |
PROBLEM TO BE SOLVED: To provide a thin film transistor array panel and a method of manufacturing the same, capable of minimizing an RC delay value difference due to a resistance difference caused by a length difference between signal applying lines. SOLUTION: The thin film transistor array panel includes: a plurality of gate lines 121 disposed on an insulating substrate 110, which extend to at least either of a first or a second peripheral area which faces each other in a horizontal direction from a display area; a gate insulating film formed on the plurality of gate lines 121; a plurality of data lines 171 disposed on the gate insulating film, which extend to at least either of a third or a fourth peripheral area in a vertical direction from the display area; a driving section 400 disposed on the first or the second peripheral area; and a plurality of data signal applying lines disposed at least on either of the third or the fourth peripheral area, in which at least in a part, each one end is connected to corresponding one end of the data line 171 so as to include a different contact area from each other, and the other end is connected to the driving section 400. COPYRIGHT: (C)2009,JPO&INPIT |
