发明名称 Arrangement and method for controlling communication of data between processors
摘要 The communication of data between two coupled processors is controlled using a ready-to-receive signal which is provided by the first processor such that it has an activated signal level or a deactivated signal level and which is used to indicate to the second processor that the first processor is or is not ready to receive data. The second processor is able to change from the awake state to a sleep state and to change back from the sleep state to the awake state. The second processor detects when the first processor changes the ready-to-receive signal from the deactivated signal level to the activated signal level while the second processor is in the sleep state and, in this case, determines that the changing of the ready-to-receive signal is a request to change to the awake state.
申请公布号 US7467312(B2) 申请公布日期 2008.12.16
申请号 US20050240815 申请日期 2005.09.30
申请人 INFINEON TECHNOLOGIES AG 发明人 ESCH MICHAEL;ROST ASTRID
分类号 G06F1/32;G06F1/00;G06F15/16;G06F15/163;H04M1/73 主分类号 G06F1/32
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