发明名称 System and method for common mode calibration in an analog to digital converter
摘要 A conversion circuit increases a gain of an analog-to-digital converter (ADC) preamplifier by minimizing a common mode offset voltage between an input signal and a reference signal. The feedback controller circuit calibrates an input common mode voltage to mitigate a common mode offset voltage. Reduction of the common mode offset voltage increases the gain of the ADC preamplifier. In an example, the method is executed during a hold phase of a track-and-hold circuit that transmits the input signal to the ADC.
申请公布号 US7466249(B2) 申请公布日期 2008.12.16
申请号 US20060633544 申请日期 2006.12.05
申请人 BROADCOM CORPORATION 发明人 CHEN CHUN-YING
分类号 H03M1/06 主分类号 H03M1/06
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