INTELLIGENT DEAD TIME CONTROL

摘要

An intelligent dead time control is provided to solve a problem providing a fixed delay for a type of a rectifier / power device by comparing the low side gate drive edge to the switch node / high side gate drive edge in order to reduce the power loss and achieve the optimum dead time. As to a circuit reducing switching loss in a synchronous rectifier of switching stage a high side control transistor and a low side motive transistor combined in a switching node, the switching stage receives input voltage and provides output voltage controlled in a output node and the circuit comprises : a first circuit part sensing the waveform edge of a first signal and the waveform edge of a first voltage at the gate terminal of the low side synchronous transistor, and determining delay between the waveform edge of the first signal and the waveform edge of the first voltage; a second circuit part arranging the waveform edge of the first signal and the waveform edge of the first voltage by calibrating the first signal and the first voltage.