发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To hold stably memory data of a memory cell in a low power consumption standby mode. SOLUTION: In a high voltage power source control circuit (15), a global negative voltage line (69) transmitting negative voltage (VBB) is separated from a local negative voltage line (71) provided corresponding to a sub-array block during a standby cycle in which supply of the power source is interrupted, A global ground line transmitting ground voltage (VSS) is separated from a local ground line (77). The local ground line and the local negative voltage line are charged to a high voltage (VPP) level through the high voltage line (67) before interruption of the corresponding power source. A leak current path for the negative voltage line or the ground line from the word lines (WL<0>-WL<m>) is interrupted, a word line of a non-selection state can be kept exactly at non-selection voltage (VPP level). COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008282474(A) 申请公布日期 2008.11.20
申请号 JP20070125773 申请日期 2007.05.10
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIMANO HIROKI;ARIMOTO KAZUTAMI
分类号 G11C11/401;G11C11/4074 主分类号 G11C11/401
代理机构 代理人
主权项
地址